Constant time Floating Point Adder Circuits

Floating point unit is commonly used in computers. However, the arithmetic logic unit (ALU) for floating point operations such as addition or subtraction is complicated. Moreover, many floating point ALUs are designed to operate in many clock cycles. Thus, its speed are varied depend on the number of clock cycle. However, in many field, circuits with fix delay time are preferred. This work proposes a constant time floating point adder circuits implemented in Field Programmable Gate Array technology. Keywords—floating point operations; find first bit value 1; adder circuits I. MOTIVATION The floating point adder is one of very widely used circuits in computing. The most common data format is IEEE 754. There are so many designs even recently, for example, one design for speed [1] another for small area [2]. There are many tradeoff in designing the circuits, mostly on area versus speed [3]. The standard high speed design with custom macro modules is presented in [4]. The design proposed here aims to achieve a constant time delay which makes it very useful for real-time embedded devices. The proposed design achieved its goal using a good binary-search for the first bit value 1 which takes O(log n) time. The design uses IEEE 754 64-bit format with 52-bit fraction. The design composed of only combination circuits. II. FLOATING POINT ADDER BEHAVIORAL DESCRIPTION In order to add or subtract floating point together, first the exponents are aligned. If the exponent bits of two data are not equal, the smaller number will increase its exponent until it is equal the other number. Then the fractions bits of the smaller number will change depended on the amount of exponent change. After this de-normalization, two numbers can be added or subtracted depending on the sign bit of operands, i.e. fraction bits. In the last step, the exponent bits will be realigned into IEEE 754 double precision format, so the fraction bits will change too. The realignment of exponents requires finding the first bit that is one in the exponent. The next section shows how to solve this problem. III. FIND FIRST SET PROBLEM Finding first bit value 1 can be solved with many algorithms. The major constraints are area and speed of circuits. The purpose of this circuits is a constant time circuits, so the speed will be the most important consideration. The divide and conquer method is used to efficiently finding the first 1 value bit from the bit string. The bit string is divided into 2 substrings with equal length, the most significant substring and the least significant substring. Then, repeat the dividing step with the most significant substring until it has only 2 bits. Then, compare the 2 bits with each other. If it is equal with 0 check another 2 bits with in the same substring generation. If it is equal with 1, the most significant bit is the first 1 value bit from bit string. If it is not equal, the higher one is the first 1 value bit from bit string. This method finds the first 1 value bit in O(log n). Moreover, the area of this method are O(2 log n – 1). IV. DESIGN The floating point adder circuits were implemented in hardware description language in order to operating in bit level. Moreover, it is implemented in combination circuits so it has a constant time delay. The design is based on the algorithm described in Section 2. The whole circuit is shown in Figure 1. Shifted bits[52:0] The other input[51:0]